This is a verilog program assignment used with Xilinx 9.1.
For this problem I need help with the code.
Implement and Test via Behavioral Simulation the following logic equation using the assign statement. The inputs are single bit variables (in1, in2,in3, and in4). There is a single output (out1). In the labeling below (* - AND, + - OR, ~ - NOT). In your Verilog code remember to use the bitwise operators & , | , ~ for AND, OR and NOT respectively.
out1 = ~in1 * (in2 + ~in3 + in4) + ~in2 * ( in1 + in3 + ~in4) + ~in2 * ~in3