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posted by  Lupine14 on 11/5/2009 8:54:13 PM  |  status: Closed  |  Earned Karma: 59

Quick Digital Circuits Question, Will rate answers.

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Digital Circuits N/A N/A N/A 11/13/2009 at 10:00:00 AM
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Explain what a full adder is and how it functions.
Explain what a half adder is and how it functions.
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posted by Chelsea_fan(MNK) on 11/5/2009 10:50:13 PM  |  status: Live
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Response Details:

A half adder can add two bits. It has two inputs, generally labeled A and B, and two outputs, the sum S and carry C.

S is the two-bit XOR of A and B, and C is the AND of A and B. Essentially the output of a half adder is the sum of two one-bit numbers, with C being the most significant of these two outputs.

A full adder is capable of adding three bits: two bits and one carry bit. It has three inputs - A, B, and carry C, such that multiple full adders can be used to add larger numbers. To remove ambiguity between the input and output carry lines, the carry in is labelled Ci or Cin while the carry out is labelled Co or Cou



Full adder

Full adder circuit diagram
Inputs: {A, B, CarryIn} → Outputs: {Sum, CarryOut}
Schematic symbol for a 1-bit full adder

A full adder is a logical circuit that performs an addition operation on three one-bit binary numbers. The full adder produces a sum of the two inputs and carry value. It can be combined with other full adders or work on its own.

S = (A \oplus B) \oplus C_{in}

C_{out} = (A \cdot B) + (C_{in} \cdot (A \oplus B)) = (A \cdot B) + (C_{in} \cdot B) + (C_{in} \cdot A)
Input Output
A B Ci Co S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

Note that the final OR gate before the carry-out output may be replaced by an XOR gate without altering the resulting logic. This is because the only difference between OR and XOR gates occurs when both inputs are 1; for the adder shown here, this is never possible. Using only two types of gates is convenient if one desires to implement the adder directly using common IC chips.

A full adder can be constructed from two half adders by connecting A and B to the input of one half adder, connecting the sum from that to an input to the second adder, connecting Ci to the other input and OR the two carry outputs. Equivalently, S could be made the three-bit XOR of A, B, and Ci, and Co could be made the three-bit  majority function of A, B, and Ci.



Half adder

Half adder circuit diagram

Schematic Symbol of Half Adder

              ___________
A ------| |
| Half |----- S = A \oplus B
| Adder |
| |----- C = A \cdot B
B ------|___________|

A half adder is a logical circuit that performs an addition operation on two one-bit binary numbers. The half adder outputs a sum of the two inputs and a carry value.

The drawback of this circuit is that in case of a multibit addition, it cannot include a carry.

S = A \oplus B
C = A \cdot B

Following is the logic table for a half adder:

A B C S
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
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